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How 3D Memory Stacks Up Introduction

Report No. FI-NFL-3DM-0409 April, 2009

Mainstream NAND flash memories are currently manufactured on 4xnm processes with major NAND flash vendors migrating to 3xnm this year. In the race to reduce costs, NAND flash manufacturers are developing 2xnm technology, however with performance and reliability characteristics severely degraded relative to the 4xnm generation, 2xnm floating gate NAND flash could be the last process technology generation. What’s next?

NAND flash vendors are actively exploring a variety of alternatives including spin-torque MRAM, nanocrystal memory, phase change memory and resistive memory. However as lithographic scaling becomes more challenging, companies are turning their sights to vertically stacked implementations of memory cells or 3D memory. 3D memory technologies offer the promise of continued increases in storage capacities and lower cost per bit necessary to enable emerging applications such as solid state drives.

Among the candidates: stacked NAND technologies employing charge trapping technology, vertical memory cells etched in a pillar and stackable cross-point memory arrays. This report explores the feasibility of each of these alternatives as a candidate to replace NAND flash memories within the next four years.

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